• 作者： 陳少傑
• 作者服務機構： 國立台灣大學電機工程學系
• 中文摘要： 本文所提之反覆策畫方案?一新的解題方案，可用來解決積體電路實體設計中的分割、平面規劃、配置與繞線等問題。文中介紹了應用此方案來解決兩類問題：即閘矩陣佈局與電路分割問題的解決。理論上，此反覆策畫方案， 因其收斂甚快，故其執行時間較一般的反覆解題方法?短。實際上，經由實驗的結果亦驗證了此反覆策畫方案的優越性。
• 英文摘要： The 'Iterative Planning Scheme (IPS)' is a novel scheme for solving problems on VLSI physical design, such as partitioning, floor-planning, placement and routing. In this paper, the IPS is introduced and explained through its applications to two kinds of problems. The first application is to use this scheme to solve the problem of gate matrix layout, and the second one is on the solving of the partitioning problem. The significance of this new scheme is that it may be applicable to other combinatorial VLSI problems where exact solution becomes infeasible and heuristic guided search is required. Theoretically, this scheme is better than the other iterative algorithms in the sense that it converges very quickly and, thus, takes less omputation time. Practically, we attempt to implement this scheme on various VLSI physical design problems in order to verify its superiority.
• 中文關鍵字： planning scheme; VLSI physical design; gate matrix layout; partitioning
• 英文關鍵字： --